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Memory - Configuration Proms for FPGA's

ModelDescriptionBrandLeadingConditionPriceAction
Memory - Configuration Proms for FPGA's
XCF32PFS48C
Xilinx introduces the Platform Flash series of in-system programmable configuration PROMs. Available in 1 to 32 Mb densities, these PROMs provide an easy-to-use, cost-effective, and reprogrammable method for storing large Xilinx FPGA configuration bitstreams. The Platform Flash PROM series includes both the 3.3V XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS version includes 4 Mb, 2 Mb, and 1 Mb PROMs that support Master Serial and Slave Serial FPGA configuration modes (Figure 1, page 2). The XCFxxP version includes 32 Mb, 16 Mb, and 8 Mb PROMs that support Master Serial, Slave Serial, Master SelectMAP, and Slave SelectMAP FPGA configuration modes (Figure 2, page 2).When driven from a stable, external clock, the PROMs can output data at rates up to 33 MHz. Refer to "AC Electrical Characteristics," page 16 for timing considerations.A summary of the Platform Flash PROM family members and supported features is shown in Table 1.Table 1: Platform Flash PROM FeaturesDeviceDensity (Mb)VCCINT (V)VCCO Range (V)VCCO Range (V)PackagesProgram In-system via JTAGSerial Config.Parallel Config.Design RevisioningCompressionXCF01S13.31.8 – 3.32.5 – 3.3VO20/VOG20 Yes Yes XCF02S23.31.8 – 3.32.5 – 3.3VO20/VOG20 Yes Yes XCF04S43.31.8 – 3.32.5 – 3.3VO20/VOG20 Yes Yes XCF08P81.81.8 – 3.32.5 – 3.3VO48/VOG48 FS48/FSG48 Yes Yes Yes Yes(1) YesXCF16P161.81.8 – 3.32.5 – 3.3VO48/VOG48 FS48/FSG48 Yes Yes Yes Yes YesXCF32P321.81.8 – 3.32.5 – 3.3VO48/VOG48 FS48/FSG48 Yes Yes Yes Yes Yes
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XCF02SVO20C
Xilinx introduces the Platform Flash series of in-system programmable configuration PROMs. Available in 1 to 32 Mb densities, these PROMs provide an easy-to-use, cost-effective, and reprogrammable method for storing large Xilinx FPGA configuration bitstreams. The Platform Flash PROM series includes both the 3.3V XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS version includes 4 Mb, 2 Mb, and 1 Mb PROMs that support Master Serial and Slave Serial FPGA configuration modes (Figure 1, page 2). The XCFxxP version includes 32 Mb, 16 Mb, and 8 Mb PROMs that support Master Serial, Slave Serial, Master SelectMAP, and Slave SelectMAP FPGA configuration modes (Figure 2, page 2).When driven from a stable, external clock, the PROMs can output data at rates up to 33 MHz. Refer to "AC Electrical Characteristics," page 16 for timing considerations.A summary of the Platform Flash PROM family members and supported features is shown in Table 1.Table 1: Platform Flash PROM FeaturesDeviceDensity (Mb)VCCINT (V)VCCO Range (V)VCCO Range (V)PackagesProgram In-system via JTAGSerial Config.Parallel Config.Design RevisioningCompressionXCF01S13.31.8 – 3.32.5 – 3.3VO20/VOG20 Yes Yes XCF02S23.31.8 – 3.32.5 – 3.3VO20/VOG20 Yes Yes XCF04S43.31.8 – 3.32.5 – 3.3VO20/VOG20 Yes Yes XCF08P81.81.8 – 3.32.5 – 3.3VO48/VOG48 FS48/FSG48 Yes Yes Yes Yes(1) YesXCF16P161.81.8 – 3.32.5 – 3.3VO48/VOG48 FS48/FSG48 Yes Yes Yes Yes YesXCF32P321.81.8 – 3.32.5 – 3.3VO48/VOG48 FS48/FSG48 Yes Yes Yes Yes Yes In-System Programmable PROMs for Configuration of Xilinx® FPGAs• Low-Power Advanced CMOS NOR Flash Process• Endurance of 20,000 Program/Erase Cycles• Operation over Full Industrial Temperature Range (–40°C to +85°C)• IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing• JTAG Command Initiation of Standard FPGA Configuration
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XC18V01SO20I
Xilinx introduces the XC18V00 series of in-system programmable configuration PROMs (Figure 1). Devices in this 3.3V family include a 4-megabit, a 2-megabit, a 1-megabit, and a 512-kilobit PROM that provide an easy-touse, cost-effective method for reprogramming and storing Xilinx FPGA configuration bitstreams.When the FPGA is in Master Serial mode, it generates a configuration clock that drives the PROM. A short access time after CE and OE are enabled, data is available on the PROM DATA (D0) pin that is connected to the FPGA DIN pin. New data is available a short access time after each rising clock edge. The FPGA generates the appropriate number of clock pulses to complete the configuration. When the FPGA is in Slave Serial mode, the PROM and the FPGA are clocked by an external clock.When the FPGA is in Master SelectMAP mode, the FPGA generates a configuration clock that drives the PROM. When the FPGA is in Slave Parallel or Slave SelectMAP mode, an external oscillator generates the configuration clock that drives the PROM and the FPGA. After CE and OE are enabled, data is available on the PROM’s DATA (D0-D7) pins. New data is available a short access time after each rising clock edge. The data is clocked into the FPGA on the following rising edge of the CCLK. A free-running oscillator can be used in the Slave Parallel or Slave SelecMAP modes.Multiple devices can be cascaded by using the CEO output to drive the CE input of the following device. The clock inputs and the DATA outputs of all PROMs in this chain are interconnected. All devices are compatible and can be cascaded with other members of the family or with the XC17V00 one-time programmable serial PROM family. In-System Programmable 3.3V PROMs for Configuration of Xilinx FPGAsEndurance of 20,000 Program/Erase CyclesProgram/Erase Over Full Industrial Voltage and Temperature Range (–40°C to +85°C)IEEE Std 1149.1 Boundary-Scan (JTAG) SupportJTAG Command Initiation of Standard FPGA ConfigurationSimple Interface to the FPGACascadable for Storing Longer or Multiple BitstreamsLow-Power Advanced CMOS FLASH ProcessDual Configuration ModesSerial Slow/Fast Configuration (up to 33 MHz)Parallel (up to 264 Mb/s at 33 MHz)5V-Tolerant I/O Pins Accept 5V, 3.3V and 2.5V Signals3.3V or 2.5V Output CapabilityDesign Support Using the Xilinx ISE™ Foundation™ Software PackagesAvailable in PC20, SO20, PC44, and VQ44 PackagesLead-Free (Pb-Free) Packaging
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17256EJC
The 17256EJC parts manufactured by XILINX are available for purchase at Jotrin Electronics website. Here you can find a wide variety of types and values ​​of electronic parts from the world's leading manufacturers. The 17256EJC components of Jotrin Electronics are carefully chosen, undergo stringent quality control, and are successfully meet all required standards.The production status marked on Jotrin.com is for reference only. If you did not find what you were looking for, you can get more value information by email, such as the 17256EJC Inventory quantity, preferential price, and manufacturer. We are always happy to hear from you so feel free to contact us.17256DDM with pin details manufactured by EXAR. The 17256DDM is available in DIP-8 Package, is part of the IC Chips.17256DPC with user guide manufactured by XINLINX. The 17256DPC is available in DIP Package, is part of the IC Chips.17256DPI with circuit diagram manufactured by XILINX. The 17256DPI is available in DIP8 Package, is part of the IC Chips.
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1.466516s